1. Field of the Invention
This invention relates to power feedback circuits. More particularly, the invention relates to a double path type power feedback circuit for multiple lamp parallel operation.
2. Description of the Background of the Invention
The low power factor (PF) of conventional electromagnetic compact fluorescent lamps (CFLS) is due to the fact that their voltage and current are not in phase and/or to the higher harmonic content in the current waveform. Electronics in the electronic CFLs, as well as in all other electronic equipment, generate harmonic currents. Harmonic currents are closely related to a reduced PF and can disturb other equipment. Furthermore, a very high harmonic distortion on a utility network may reduce the performance of the transformers and could ultimately damage them.
An electronic CFL has a typical power factor of between 0.5 and 0.6, but the current cannot be simply compensated for with a capacitor. Instead, a filter has to be introduced, either in the ballast of the lamp itself or somewhere in the electricity network. In countries where the International Electroctechnical Commission (IEC) standards are adopted, the lighting equipment must have a power factor better than 0.96 and a Total Harmonic Distortion (THD) below 33%. However an exception is made in the IEC lighting standards for equipment with a rated power of less than 25W.
The single stage electronic ballast based on the power feedback principles has been disclosed and described in numerous patents, including U.S. Pat. No. 5,404,082 in the names of A. F. Hernandez and G. W. Bruning, and entitled xe2x80x9cHigh Frequency Inverter with Power-line-controlled Frequency Modulation,xe2x80x9d and U.S. Pat. No. 5,410,221 in the names of C. B. Mattas and J. R Bergervoet, and entitled xe2x80x9cLamp Ballast with Frequency Modulated Lamp Frequencyxe2x80x9d. The type of ballast described in these patents has a lower parts count due to a modulation scheme imbedded in a power conversion process. These patents describe the conversion of a low frequency alternating current (AC) voltage source to a high frequency AC voltage source via a properly designed power feedback scheme. These patents further describe how the harmonic content of an input current can be limited within the International Electrotechnical Commission (IEC) specification while the output current crest factor remains acceptable. Topologically, the single stage power factor correction is achieved based on the power feedback to the node between the full-bridge rectifier output and the DC electrolytic capacitor.
To date, all of the power feedback schemes are used for a single lamp and a two lamp series configuration, with and without dimming. It is important to point out that in such a class of applications the value of the resonant converter parameters L and C are fixed, even though the load current can be changed during the dimming process. Technically, this implies that the circuit resonant frequency is fixed while the quality factor (Q) is changed with the load. The quality factor Q may be described as the ratio of the resonant frequency to bandwidth.
In the multiple lamp operation circuit 10, shown in FIG. 1, lamps Rlp are connected in parallel, via ballast capacitors C1p, respectively, due to the. independent lamp operation (ILO) requirements. Lamps Rlp and ballast capacitors Clp are then connected in parallel to a transformer T1, which in turn is connected in parallel to a capacitor C3. Capacitor C3 is connected to diodes D3, D4 of the full-bridge rectifier represented by diodes D1-D4, and diodes D1, D2 are connected to a resonant inductor L1, which in turn is connected to a diode D5. Diode D5 is further connected to a drain terminal of a positive-negative-positive (PNP) transistor Q2, and the source terminal of transistor Q2 is connected to a drain of a PNP transistor Q3. Gates of both transistors Q1 and Q2g are connected to a high voltage control integrated circuit 12.
A first terminal of a resistor R, is connected to the source terminal of the transistor Q3 and a second terminal of this resistor is connected to a first terminal of the capacitor C3, a resistor R2 and diodes D3 and D4. The high voltage control integrated circuit 12 further connects to the connection of the source terminal of the transistor Q3 and a first terminal of the resistor Rl, individually to a capacitor C2, and to the interconnection of the inductor L2 and capacitor C3. The capacitor C2 and the inductor L2 are serially interconnected. The inductor L2 is further connected to the capacitor C3.
A capacitor C1 is on a first side connected between a diode D5 and the drain terminal of transistor Q2, and on the second side between diodes D3, D4 and the resistor R1. A drain terminal of the PNP transistor Q1 is connected to the junction of the inductor L1 and the diode D5 and the source terminal of the transistor Q1 is connected to a resistor R2, which is also connected diodes D3 and D4, and the capacitor C1. A power factor controller unit 14 is connected to the inductor L1, the gate of the transistor Q1, to the connection of the source terminal of transistor Q1 and resistor R2, and to the connection of diode D5 and capacitor C1.
In this configuration the resonant capacitance is strongly load dependent. This dependence with respect to 0 to 4 lamp combinations is shown in FIG. 2a, where five distinct resonant frequency curves are charted on a voltage/frequency chart. Here, the zero lamp curve 20 represents a scenario in which no lamps are connected, the one lamp curve 22 represents a scenario in which one lamp is connected, the two lamp curve 24 represents a scenario in which two lamps are connected, the three lamp curve 26 represents a scenario in which three lamps are connected, and finally the four lamp curve 28 represents a scenario in which four lamps are connected. The respective frequency peaks of the curves 22, 24, 26 and 28 are 9.554215xc3x97104, 7.52929xc3x97104, 6.503028xc3x97104, and 5.843909xc3x97104.
FIG. 2b shows the same five distinct resonant frequency curves, charted on a primary side resonant tank input phase/frequency chart. In this graph, the zero lamp curve 30 reaches a low phase point of xe2x88x9290, the one lamp curve 32 reaches a low phase point of xe2x88x9223.360583, the two lamp curve 34 reaches a low phase point of xe2x88x9214.71952, and the three lamp curve 36 reaches a low phase point of xe2x88x925.566823.
Traditionally, the power feedback power factor correction circuits are limited to a fixed load operation. When the load changes, the input line power factor and current THD performance drop. Even more severe situation is that the DC bus voltage increases dramatically as the load decreases. Such DC bus as voltage over boost usually leads to the damage of power switches if they are not substantially over designed. This problem is encountered during the development of a power feedback circuit for four lamp ballast circuits.
In view of those variables and the sinusoidal input voltage, it would be advantageous to have a simple single stage electronic ballast circuit based on the power feedback scheme for multiple lamp operation.
The ballast circuit of the invention is designed for a single or multiple lamp parallel operation, where at each lamp a condition may be controlled such that the amplitude (e.g. the switching frequency of the power transistors) output voltage is almost constant in the steady state. The present invention uses fewer high ripple current rated capacitors than the prior art while providing galvanic isolation. Furthermore, in addition to using smaller input filter sizes, the inventive circuit uses fewer fast reverse recovery diodes necessary for the prior art circuit schemes.
In order for the inventive power feedback circuit to work with multiple lamp combinations under variable load conditions and without severe DC bus voltage over boost, the resonant tank is designed with an LLC type resonant circuit instead of the previously used LC type. Accordingly, the circuit switching frequency is changed for each lamp number condition. When a lamp number condition is settled, the circuit operates at a selected frequency without line frequency modulation content.
The circuit of the invention comprises a DC storage capacitor, a DC blocking capacitor, a half-bridge of power transistors which alternately switch on and off and have a 50% duty ratio, and an LLC resonant converter having a resonant inductor, a output transformer, and one or more effective resonant capacitors. The circuit comprises an output transformer, which provides galvanic isolation for a double path type power feedback scheme. The output transformer produces magnetizing inductance utilized for power feedback circuit optimization and is inserted right after the resonant inductor of the half-bridge circuit.
Furthermore, the circuit of the invention comprises an input line filter having an inductor and a capacitor for bringing an input current close to a sinusoidal waveform with low THD, a current rectifier comprising a plurality of diodes, a plurality of fast reverse recovery diodes, and a plurality of ballasting capacitors that contribute to a resonant capacitance and allows the use of fewer capacitors in the half-bridge circuit.